1. Field of the Invention
This invention relates to CMOS circuits for generating a bandgap reference voltage, and more particularly to bandgap reference circuits that have reduced initial voltage reference error and temperature drift.
2. Description of Related Art
Reference voltage circuits are used by integrated circuit designers for many purposes, including analog to digital converters, regulated power supplies, comparator circuits, and some types of logic circuits. A particularly useful type of reference voltage circuit is the "bandgap" reference circuit, also known as the V.sub.BE reference circuit, the theory of which is to generate a voltage with a positive temperature coefficient having the same magnitude as the negative temperature coefficient of V.sub.BE ; then to add V.sub.BE to the generated voltage to cancel the temperature dependency.
One type of parasitic npn bipolar transistors available from standard CMOS processes is a vertical transistor with its emitter, base and collector corresponding to, respectively, the source-drain n+ region, the p-well region, and the n- silicon substrate. The collectors of these parasitic vertical transistors are in the substrate, so that the transistors are suitable for use in a common collector configuration only.
One well known reference voltage circuit 10 which makes use of vertical parasitic transistors is illustrated in FIG. 1. VCC is applied at terminal 12, which corresponds to the substrate of the CMOS integrated circuit. Circuit ground is at terminal 14. Transistors 6 and 8 are parasitic NPN transistors, each of which uses the IC substrate for its collector, a P-well for its base, and an N-type drain/source region for its emitter. Resistors 20 and 22, which are the same value, are the load resistors for transistors 6 and 8 respectively. Resistor 24 is connected in the emitter circuit of transistor 6 to develop across it a temperature sensitive voltage.
The inputs of a differential amplifier 26 are connected across the equal valued resistors 20 and 22, and the output V.sub.REF, or reference voltage, is fed back to drive the bases of transistors 6 and 8. Due to this feedback, the potentials across the differential inputs at nodes 27 and 28 are equal (assuming amplifier 26 to be perfect, i.e. having infinite gain and input impedance). Even so, the current density in the emitter of transistor 6 is less than that of transistor 8 because of the voltage developed across resistor 24. Hence, transistors 6 and 8 exhibit different base-emitter potentials given by ##EQU1## wherein T is absolute temperature, k is the Boltzman constant, q is the charge of an electron, and I.sub.8 /I.sub.6, A.sub.6 /A.sub.8 are the ratios of the current and emitter area of transistors 8 and 6 respectively. The quantity kT/q is also known as the "volt-equivalent of temperature," and commonly represented by V.sub.T.
The difference in base-emitter potential .DELTA.V.sub.BE between transistors 6 and 8 appears across resistor 24 with a positive temperature coefficient. Since the current producing V.sub.R24 also flows through resistor 20, .DELTA.V.sub.BE having a positive temperature coefficient is imposed across resistor 22. Since resistors 20 and 22 are matched and the potential at nodes 27 and 28 maintained equal, a positive temperature coefficient attributable to .DELTA.V.sub.BE also is imposed across resistor 22. As V.sub.BE8 is of negative temperature coefficient, the one can be used to offset the other.
The value of .DELTA.V.sub.BE is set by establishing the respective emitter areas of transistors 6 and 8 at an appropriate ratio with the same I.sub.6 and I.sub.8, in accordance with equation 1. Temperature compensation is achieved by adjusting value of R.sub.20, R.sub.22 and R.sub.24.
Unfortunately, ideal CMOS amplifiers suitable for use as amplifier 26 are not available. Practical CMOS differential amplifiers have a temperature dependent input offset voltage that reduces the effectiveness of the bandgap reference circuit 10. The effect of the input offset voltage VOS on the bandgap reference circuit 10 is given by: ##EQU2## The input offset voltage of a CMOS differential amplifier typically is high; a value of greater than 2 mV is common. The ratio of (1+R20/R24) also is high; a value of 10 is common. Applying these common values, an error of 20 mV appears at the output of the amplifier 26, which does not permit the potential at nodes 27 and 28 to be maintained in equality.
Moreover, the input offset voltage is temperature dependent. The effect of this temperature dependency on the bandgap reference circuit 10 is given by the differential expression: ##EQU3## It will be appreciated that the offset voltage temperature dependency term .delta.V.sub.OS /.delta.T is multiplied by the ratio (1+R.sub.20 /R.sub.24), which further degrades performance of the bandgap reference 10.
Several approaches have been taken in recognition of the performance limitations of the bandgap reference 10. One approach is to improve the performance of the differential amplifier used in the bandgap reference circuit 10, but this approach places significant restraints on the design of the amplifier 26. In any event, many of the causes responsible for the temperature dependent input offset voltage also are process sensitive. Another approach is typlified by U.S. Pat. No. 4,375,595, issued Mar. 1, 1983 to Ulmer et al. This and other such approaches increase circuit complexity and chip cost, however.
Recently, parasitic lateral NPN transistors have been used in the design of improved CMOS bandgap reference circuits. Two such circuits are disclosed in Degrauwe et al., "CMOS voltage references using lateral bipolar transistors," in IEEE Journal of Solid State Circuits, Vol. SC-20, No. 67, Dec. 1985, pp. 1151-57. As shown in FIGS. 7(a) and 7(b) of the Degrauwe et al. article, these circuits use lateral bipolar transistors in combination with a current mirror, an output amplifier, and a voltage controlled current source. Unfortunately, the voltage controlled current source itself is fairly complex, being implemented by five additional resistors and an additional lateral transistor. Hence, the size of the bandgap circuit is increased.